As complementary metal-oxide-semiconductor (CMOS) scaling may be reaching its theoretical limit, apparently evading the historical Moore's law, it may necessitate a strategic shift from pure down-scaling to a hunt for new functional materials and hybrid technology platforms. On the verge of ‘beyond silicon’ era, much attention may be focused on the alternative materials, inclusive of carbon nanotubes and semiconducting nanowires. Because of the unique electronic band structures and reduced carrier scattering in quasi-1D materials like nanotubes and nanowires, novel device functionalities in scalable circuit architectures may be realized. Nevertheless, lack of controlled assembly, fabrication intricacy and low throughput may be posing persistent challenges to advance from a single device level to a functional circuit level. Thus, it may be imperative to develop rational strategies for the assembly of building blocks into increasingly complex structures.
Conventionally, electron-beam (e-beam) lithography technique may have been employed in fabricating logic devices and integrated circuits based on nanotubes and nanowires. Though a certain level of design complexities and low-scale integration may be achieved, the e-beam lithography approach involving multiple process steps may yet to carve a niche as long as the throughput may be concerned. Further, the need to register individual nanowire (nanotube)-electrode interconnects may prevent e-beam lithography to realize its full potential.
Therefore, there is a need to provide an alternative method to fabricate nano-scale digital logic elements which may overcome or at least alleviate some of the above-mentioned problems.